The architectural design of high-capacity data networks that provide quality of service is a challenging task that has inspired a great deal of inventive ingenuity. Network architectures which enable the construction of networks that scale to hundreds of Tera bits per second have been described in patent applications filed by the Applicant. For example, in U.S. patent application Ser. No. 09/286,431 (now issued as U.S. Pat. No. 6,570,872), filed on Apr. 6, 1999 and entitled SELF-CONFIGURING DISTRIBUTED SWITCH, a network architecture is described in which a plurality of high-capacity electronic edge modules are interconnected by an agile wavelength-switching optical core. U.S. patent application Ser. No. 09/475,139 (now issued as U.S. Pat. No. 6,486,983), filed on Dec. 30, 1999 and entitled AGILE OPTICAL-CORE DISTRIBUTED PACKET SWITCH, describes an architecture for an optical-core network in which the optical switching latency is masked. In U.S. patent application Ser. No. 09/550,489 (now issued as U.S. Pat. No. 6,876,649), filed Apr. 17, 2000 and entitled HIGH CAPACITY WDM-TDM PACKET SWITCH, a network architecture is described in which a plurality of electronic edge modules are interconnected by electronic space switches which are operated in a time division multiplexed (TDM) mode. The use of TDM permits a channel (typically a wavelength in a WDM transport medium) to be split into several sub-channels. This increases the number of edge modules that can be directly reached without a requirement for tandem switching.
Network architectures in Applicants' copending patent applications enable the construction of a network having edge control to satisfy quality-of-service requirements. Those networks can scale to about 1 Peta bits per second, i.e., 1015 bits per second. The number of edge modules in those networks is generally limited to about 1,000.
With the rapid growth of Internet traffic, and the potential for innovative applications that may require capacities that are orders of magnitude higher than current capacity requirements, a new approach to network design appears to be necessary. Backbone networks to support the potential expansion of the Internet require architectures adapted to support much wider coverage and higher capacity than the networks described to date. A global Internet can potentially include millions of edge modules with a combined user access capacity that approaches a Yotta bits per second (1024 bits per second). One well-known method for constructing networks of that magnitude is to use a hierarchical structure where traffic streams from source nodes are aggregated into larger streams that are switched at coarse granularities in higher levels of the hierarchy.
The control complexity of hierarchical networks prompts a search for a different architecture. A multi-dimensional structure appears to be a promising approach. One of the well-known two-dimensional architectures is the so-called Manhattan-street network described in U.S. Pat. No. 4,797,882 which issued on Jan. 10, 1989 to Maxemchuk, entitled MESH-BASED SWITCHING NETWORK. Another example is U.S. Pat. No. 5,606,551 which issued on Feb. 25, 1997 to Kartalopoulos entitled BIDIRECTIONAL MESH NETWORK. Kartalopoulos describes a mesh network that is similar to the one described by Maxemchuk but uses intersecting bidirectional links.
A three-dimensional mesh network, known as a Torus network, in which each node can direct traffic to neighboring nodes along three dimensions is described in a paper by Banerjee et al. entitled “The Multi-Dimensional Torus: Analysis of Average Hop Distance and Application as a Multi-Hop Lightwave Network (IEEE, International Conference on Communications, 1994, pp. 1675-1680). The nodes in such networks are arranged in intersecting rings.
The mesh networks referred to above were designed to use bufferless nodes. Consequently, each node had to direct an incoming data unit to one of its neighboring nodes immediately upon arrival. The same architecture can be used with nodes capable of buffering incoming data units to resolve conflicting forwarding requirements. In either case, the mean number of hops from a source node to a sink node is proportional to the number of nodes in each of the rings. This dramatically reduces the efficiency of the network and limits its application to small-scale networks.
Another mesh architecture that uses intersecting buses is described in U.S. Pat. No. 5,499,239 which issued on Apr. 14, 1995 to Munter. Munter teaches a network architecture based on an implementation of a three-stage Clos network wherein each space-switching module is replaced by a bus. Each of the three stages is replaced by a set of parallel buses. The buses are interconnected by selectors for routing data between buses. This architecture has the same scalability limitations as a classical Clos network. It is, however, suitable for constructing a centralized switching node having a total capacity of several Tera bits per second.
Methods for constructing networks that scale virtually indefinitely are required to accommodate new specifications that may require capacities well beyond the Peta bits per second enabled by prior art network architectures. There therefore exists a need for a network architecture which enables the construction of a high-capacity network adapted to provide ensured quality-of-service over a very wide geographical area.